1. Field of the Invention
The present invention relates to a DC-DC converter, and more particularly to a DC-DC converter using an inductor and a switch element for boosting a DC voltage supplied from a power source to an intended level.
2. Description of the Background Art
A type of multiple-output DC-DC converter in which a single boost inductor is shared by a plurality of boost converters has been known in the art. FIG. 11 is a circuit diagram illustrating a conventional multiple-output DC-DC converter 100 disclosed in Japanese Laid-Open Patent Publication No. 2003-164143. Referring to FIG. 11, the DC-DC converter 100 includes an input terminal 105, an inductor 106, a main switch element 110, a control circuit 111, a sub-switch element 122, rectifier circuits 113 and 123, smoothing circuits 114 and 124 and output terminals 115 and 125. During the operation of the DC-DC converter 100, a DC power source 60 is connected to the input terminal 105, and loads 61 and 62 to the output terminals 115 and 125, respectively.
Referring to FIG. 11, the rectifier circuit 113, the smoothing circuit 114 and the output terminal 115 together function as a first output circuit, and the sub-switch element 122, the rectifier circuit 123, the smoothing circuit 124 and the output terminal 125 together function as a second output circuit. The DC-DC converter 100 boosts a DC voltage supplied from the DC power source 60 with a single inductor, and outputs a first output voltage VO1 through the output terminal 115 and a second output voltage VO2 through the output terminal 125.
The DC power source 60 provides a DC power source input potential VIN to the DC-DC converter 100. The inductor 106 receives a power supply from the DC power source 60 to accumulate an energy therein, and produces an induced voltage higher than the power source input potential VIN according to the accumulated energy. The main switch element 110 is an N-channel MOS transistor. The main switch element 110 is turned ON/OFF by a control signal VG0 applied to the gate thereof to selectively accumulate an energy in the inductor 106 or produce an induced voltage across the inductor 106.
The rectifier circuit 113 is a diode, for example, and rectifies the incoming current. The smoothing circuit 114 removes ripples from the current having passed through the rectifier circuit 113. The current having passed through the smoothing circuit 114 flows into the load 61 via the output terminal 115. The rectifier circuit 123, the smoothing circuit 124 and the output terminal 125 also function in the same manner. The loads 61 and 62 may each be any circuit (e.g., an LCD) receiving a power supply from the DC-DC converter 100. The load 61 is driven by the first output voltage VO1 from the output terminal 115, and the load 62 by the second output voltage VO2 from the output terminal 125.
The sub-switch element 122, being an N-channel MOS transistor, is provided between the rectifier circuit 123 and the output terminal 125. The sub-switch element 122 is turned ON/OFF by a control signal VG2 applied to the gate thereof for selectively passing a current to the load 62.
The control circuit 111 receives a power supply from the DC power source 60 to output the control signal VG0 to be applied to the gate of the main switch element 110 and the control signal VG2 to be applied to the gate of the sub-switch element 122. The control signal VG0 is switched between a high level (hereinafter referred to as the “H level ”) and a low level (hereinafter referred to as the “L level”) at predetermined intervals, whereas the control signal VG2 is at the H level only in a period during which a current is passed to the load 62 for increasing the second output voltage VO2.
FIG. 12 is a diagram showing transitions of currents, voltages and switch elements in the DC-DC converter 100. In FIG. 12, IMS1 denotes the current flowing through the main switch element 110, and ILX the current flowing through the inductor 106. VP denotes the output-side potential of the inductor 106 (i.e., the potential at a connecting point between the inductor 106 and the main switch element 110). ISW1 denotes the output current of the rectifier circuit 113, and ISW2 the output current of the sub-switch element 122. In the following description, it is assumed that VIN<VO1<VO2 (e.g., VIN=3 V, VO1=4 V and VO2=8 V).
The operation of the DC-DC converter 100 is outlined below. Referring to FIG. 12, the control signal VG0, which is switched between the H level and the L level at predetermined intervals, is applied to the gate of the main switch element 110. Therefore, the main switch element 110 is switched between the ON state and the OFF state at predetermined intervals. While the main switch element 110 is in the ON state, the inductor 106 receives a power supply from the DC power source 60 to accumulate an energy therein. Herein, the accumulation of an energy in the inductor will be referred to as “charging”, and the period during which the inductor is being charged will be referred to as the “charge period”. In the charge period, the potential VP remains at 0 V.
In the instant the main switch element 110 transitions from the ON state to the OFF state, an induced voltage is produced across the inductor 106 by the energy accumulated in the inductor 106, thereby significantly increasing the potential VP. Thereafter, the inductor 106 releases the accumulated energy. Herein, the release of an energy from the inductor will be referred to as “discharging”, and the period during which the inductor is being discharged will be referred to as the “discharge period”.
In the discharge period, the control signal VG2 applied to the gate of the sub-switch element 122 is controlled to be at the L level or the H level. Where the control signal VG2 is at the L level in the discharge period, a current is passed through the first output circuit by the energy released from the inductor 106, thereby increasing the first output voltage VO1. Where the control signal VG2 is at the H level in the discharge period, a current is passed not only through the first output circuit but also through the second output circuit by the energy released from the inductor 106, thereby increasing both the first and second output voltages VO1 and VO2. The current ISW1 flowing through the first output circuit is rectified by the rectifier circuit 113 and smoothed by the smoothing circuit 114, whereby the first output voltage VO1 increases smoothly in the discharge period. This is similarly true for the current ISW2 flowing through the second output circuit and the second output voltage VO2.
When the accumulated energy is completely released from the inductor 106, the potential VP decreases to the power source input potential VIN. Thereafter, no current or voltage transition occurs in the DC-DC converter 100 until the control signal VG0 is brought to the H level again. Herein, the state of the inductor in this period will be referred to as the “stand-by state”, and the period during which the inductor is in the stand-by state will be referred to as the “stand-by period”.
As the inductor 106 undergoes the charge, discharge and stand-by periods repeatedly, the first and second output voltages VO1 and VO2 increase stepwise. If the control signal VG2 is controlled to be at the L level in the discharge period, only the first output voltage VO1 increases, whereas if the control signal VG2 is controlled to be at the H level in the discharge period, the first and second output voltages VO1 and VO2 both increase. Herein, a charge period, the following discharge period and the following stand-by period together will be referred to as a “boost period”.
Referring to FIG. 12, a boost period TX1 includes a charge period t1, a discharge period t2 and a stand-by period t3, and a boost period TX2 includes a charge period t4, a discharge period t5 and a stand-by period t6. It is intended that only the first output voltage VO1 increases in the boost period TX1, whereas the first and second output voltages VO1 and VO2 both increase in the boost period TX2. In the charge period t1, merely the energy accumulation in the inductor 106 occurs, and neither one of the first and second output voltages VO1 and VO2 increases. As the charge period t1 ends and the discharge period t2 begins, the potential VP is increased significantly by the induced voltage across the inductor 106. In the discharge period t2, the control signal VG2 is controlled to be at the L level. Therefore, in the discharge period t2, a current is passed through the first output circuit by the energy released from the inductor 106, thereby increasing the first output voltage VO1. In this period, no current flows through the second output circuit, and the second output voltage VO2 does not increase. As the discharge period t2 ends and the stand-by period t3 begins, the potential VP decreases to the power source input potential VIN. In the stand-by period t3, neither one of the first and second output voltages VO1 and VO2 increases. Thus, in the boost period TX1, only the first output voltage VO1 increases.
The operation of the DC-DC converter 100 in the boost period TX2 is the same as that in the boost period TX1, except as follows. In the discharge period t5 of the boost period TX2, the control signal VG2 is controlled to beat the H level. Therefore, in the discharge period t5, a current is passed not only through the first output circuit but also through the second output circuit by the energy released from the inductor 106, thereby increasing both the first and second output voltages VO1 and VO2.
However, the DC-DC converter 100 has a problem in that the second output voltage VO2 cannot be boosted to a level higher than the power source input potential VIN, as discussed below. Assume a case where the DC-DC converter 100 attempts to further increase the second output voltage VO2, already being substantially equal to the power source input potential VIN, in a boost period TX3 in FIG. 12. In this case, as a charge period t7 ends and a discharge period t8 begins, the control signal VG0 transitions from the H level to the L level and the control signal VG2 transitions from the L level to the H level. In order to bring the sub-switch element 122, being an N-channel MOS transistor, to the ON state, the gate potential needs to be made higher than the source potential. However, with the second output voltage VO2 being substantially equal to the power source input potential VIN, even if the control signal VG2 is switched to the H level, the gate potential of the sub-switch element 122 is substantially equal to the source potential thereof, whereby the sub-switch element 122 remains in the OFF state. Therefore, no current is passed through the second output circuit by the energy released from the inductor 106, whereby the second output voltage VO2 does not increase. Thus, the DC-DC converter 100 is not capable of boosting the second output voltage VO2 to a level higher than the power source input potential VIN.
A DC-DC converter 150 illustrated in FIG. 13 is an approach to solving this problem. The DC-DC converter 150 differs from the DC-DC converter 100 in that a sub-switch element 152 is a P-channel MOS transistor and that a control circuit 151 outputs a control signal VG2 of an opposite polarity with respect to that outputted by the control circuit 111.
FIG. 14 is a diagram showing transitions of currents, voltages and switch elements in the DC-DC converter 150. In the example illustrated in FIG. 14, it is intended that only the first output voltage VO1 increases in a boost period TY1, whereas the first and second output voltages VO1 and VO2 both increase in a boost period TY2. In the discharge period t5 of the boost period TY2, the control signal VG2 is controlled to be at the L level. Thus, the gate potential of the sub-switch element 152 becomes lower than the source potential, whereby the sub-switch element 152, being a P-channel MOS transistor, is brought to the ON state. Therefore, in the discharge period t5, a current is passed not only through the first output circuit but also through the second output circuit by the energy released from the inductor 106, thereby increasing both the first and second output voltages VO1 and VO2.
Even if the second output voltage VO2 is substantially equal to the power source input potential VIN, the sub-switch element 152 can be brought to the ON state by controlling the control signal VG2 to be at the L level, thereby increasing the second output voltage VO2. This is for the following reason. The gate potential needs to be made lower than the source potential in order to bring the sub-switch element 152, being a P-channel MOS transistor, to the ON state. In the discharge period, the gate potential is at the L level, and-the source potential is higher than the power source input potential VIN. Thus, the DC-DC converter 150 is capable of boosting the second output voltage VO2 to a level higher than the power source input potential VIN.
However, the DC-DC converter 150 has a problem in that the sub-switch element 152 cannot be turned ON/OFF accurately, whereby the second output voltage VO2 cannot be made equal to an intended value (hereinafter referred to as the “target voltage”) This problem will now be discussed for the boost period TY1 in FIG. 14. In the boost period TY1, it is intended that only the first output voltage VO1 increases. Therefore, the sub-switch element 152 needs to be in the OFF state in the discharge period t2 of the boost period TY1. In order to bring the sub-switch element 152, being a P-channel MOS transistor, to the OFF state, the gate potential needs to be made equal to or greater than the source potential.
However, in the discharge period t2, the potential VP is significantly higher than the power source input potential VIN due to the induced voltage across the inductor 106. Therefore, even if the control signal VG2 is kept at the H level (see a portion marked “E1” in FIG. 14) in order to bring the sub-switch element 152 to the OFF state, the sub-switch element 152 is brought to the ON state in the discharge period t2 (see a portion marked “E2” in FIG. 14). Therefore, in the discharge period t2, in which only the first output voltage VO1 is supposed to increase, the second output voltage VO2 also increases due to the current ISW2 passing through the sub-switch element 152 (see a portion marked “E3” in FIG. 14). Therefore, with the DC-DC converter 150, the sub-switch element 152, being a P-channel MOS transistor, cannot be turned ON/OFF accurately, whereby the second output voltage VO2 cannot be made equal to the target voltage.
A similar problem arises also where the ON time of the sub-switch element 152 is controlled so as to adjust the increase of the second output voltage VO2. FIG. 15 is a diagram, similar to FIG. 14, showing transitions of currents, voltages and switch elements in the DC-DC converter 150. In a boost period TZ2 in FIG. 15, it is intended that the first and second output voltages VO1 and VO2 both increase, and the difference between the second output voltage VO2 and the target voltage at the beginning of the boost period TZ2 is smaller than the increase of the second output voltage VO2 for a single boost.
In this case, the DC-DC converter 150 performs a feedback control where the pulse width of the control signal VG2 is varied while the control signal VG0 is transitioned at predetermined intervals in order to make the second output voltage VO2 equal to the target voltage. More specifically, the control circuit 151 detects the level of the second output voltage VO2 using detection means (not shown), and reduces the pulse width of the control signal VG2 (see a portion marked “E4” in FIG. 15) if the detected level is close to the target voltage. With this feedback control, if the second output voltage VO2 is close to the target voltage, the ON time of the sub-switch element 152 is shortened to reduce the current flowing through the second output circuit. Therefore, the second output voltage VO2 can be increased in steps smaller than normal.
However, also in the discharge period t5 of the boost period TZ2, the source potential of the sub-switch element 152 is significantly higher than the power source input potential VIN. Therefore, even if the control signal VG2 is transitioned to the H level, the gate potential of the sub-switch element 152 remains higher than the source potential thereof. Thus, the sub-switch element 152 is always in the ON state during the discharge period t5, whereby the increase of the second output voltage VO2 does not change even if the pulse width of the control signal VG2 is reduced. As described above, with the DC-DC converter 150, the ON time of the sub-switch element 152 cannot be made shorter than a single discharge period, whereby the second output voltage VO2 cannot be made equal to the target voltage.